1. Field of the Invention
This invention relates to improvements in translinear circuits, and more particularly to circuits that employ a translinear principle, and still more particularly to improvements in translinear loops that reduce or remove the effects of singularities that may exist, and still yet more particularly to improvements in translinear loops of the type that may be used in piecewise-polynomial-continuous function generators, reciprocators, or like circuits that have a P/Q polynomial transfer function form.
2. Relevant Background
When a bipolar transistor is operated in its forward active region, the relationship between its collector current IC and its base-emitter voltage VBE is
                              I          C                =                              I            S                    ⁢                      exp            ⁡                          (                                                                    V                    BE                                                        n                    ⁢                                                                                  ⁢                                          V                      T                                                                      -                1                            )                                                          [        1        ]            where IS is the saturation current, n is the emission coefficient, and VT is the thermal voltage. Assuming that the transistor operates in low-level injection, the emission coefficient lies very close to unity and can usually be neglected. Assuming that the current levels are not too small, the “−1” term can be ignored, and equation [1] simplifies to
                              I          C                =                              I            S                    ⁢                      exp            ⁡                          (                                                V                  BE                                                  V                  T                                            )                                                          [        2        ]            
Solving this equation for VBE gives
                              V          BE                =                              V            T                    ⁢                      ln            ⁡                          (                                                I                  C                                                  I                  S                                            )                                                          [        3        ]            
The saturation current IS that appears in these equations is actually the product of emitter area AE and saturation current density JS,IS≡AEJS  [4]
The collector current obeys this equation over a large range of currents, typically spanning some five or six decades of current. A large class of circuits exists that use this relationship to perform analog signal processing. Many of these circuits contain a translinear loop, which is used herein to mean a loop of forward-biased junctions, half of which are oriented in a clockwise direction, and half in a counterclockwise direction. FIG. 1A shows an example of a circuit 10 that contains a translinear loop, and FIG. 1B shows a circuit 12 that illustrates this loop.
In the circuit 10 of FIG. 1A, to which reference is first made, the left side of the loop includes two NPN transistors Q1 and Q2, respectively in series with current sources by IA and IB. The current source IA is connected between the supply line and the collector of Q1 and the current source IB is connected between the emitter of transistor Q2 and the reference potential. Similarly, the right half of the loop 10 has two transistors Q3 and Q4. A current source IC is connected between the emitter of transistor Q3 and the reference potential, and the collector of transistor Q4 serves as the output.
The circuit diagram of FIG. 1B, to which reference is now additionally made, is a diagrammatic illustration of the relationship among the transistors Q1, Q2, Q3, and Q4. As can be seen, the transistors Q1 and Q2 define a counterclockwise voltage path, and transistors Q3 and Q4 define a clockwise voltage path.
Applying Kirchoff's voltage law to the translinear loop of FIG. 1 gives the equationVBE1+VBE2=VBE3+VBE4  [5]
Substituting equation [3] into equation [5] gives
                                                        V              T                        ⁢                          ln              ⁡                              (                                                      I                    A                                                        I                    S1                                                  )                                              +                                    V              T                        ⁢                          ln              ⁡                              (                                                      I                    B                                                        I                    S2                                                  )                                                    =                                            V              T                        ⁢                          ln              ⁡                              (                                                      I                    C                                                        I                    S3                                                  )                                              +                                    V              T                        ⁢                          ln              ⁡                              (                                                      I                    D                                                        I                    S4                                                  )                                                                        [        6        ]            
Substituting equation [4] in for all the saturation currents and reducing the equation gives
                                                        I              A                        ⁢                          I              B                                                          A              E1                        ⁢                          A              E2                                      =                                            I              C                        ⁢                          I              D                                                          A              E3                        ⁢                          A              E4                                                          [        7        ]            
If all four transistors have the same emitter area, then the output current ID equals
                              I          D                =                                            I              A                        ⁢                          I              B                                            I            C                                              [        8        ]            
The translinear circuit of FIG. 1 is an example of a broad class of translinear circuits, all of which can be analyzed in a manner similar to that given above. The generalized form of equation [6] becomes
                                          ∑            CW                    ⁢                      V            BE                          =                              ∑            CCW                    ⁢                      V            BE                                              [        9        ]            where CW and CCW stand for clockwise- and counterclockwise-oriented junctions. The generalized form of equation [7] then reduces to
                                          ∏            CW                    ⁢                                    I              C                                      A              E                                      =                              ∏            CCW                    ⁢                                    I              C                                      A              E                                                          [        10        ]            
If the collector current density is defined as J≡IC/AE, then equation [10] simplifies to
                                          ∏            cw                    ⁢          J                =                              ∏            CCW                    ⁢          J                                    [        11        ]            
This equation is the most succinct version of the translinear principle, first formulated by Barrie Gilbert, which he stated as follows: “In a closed loop containing an even number of forward-biased junctions, arranged so that there are an equal number of clockwise-facing and counterclockwise-facing polarities, the product of the current densities in the clockwise direction is equal to the product of the current densities in the counterclockwise direction.”
One of the uses for translinear circuits of the type to which the present invention pertains is to provide polynomial function generators. One classical translinear circuit is the one-quadrant multiplier 10, the four-term version of which is shown in FIG. 1. This circuit can be elaborated to any even number of terms by cascading additional transistors below Q1 and Q4. An arbitrary one-quadrant multiplier of this sort can synthesize any polynomial function P/Q, where P and Q are products of positive linear combinations of an arbitrary number of input variables, such as
                    Y        =                                            (                                                X                  1                                -                3                            )                        ⁢                          (                                                X                  2                                +                                  2                  ⁢                                      X                    1                                                              )                                            3            ⁢                          X              3                                                          [        12        ]            
There exists a larger superset of piecewise-polynomial-continuous functions. For such a function, the range of the independent variables Xi is divided into N>1 separate regions, in each of which the function is defined by a polynomial of the form P/Q. Furthermore, the function itself is continuous, although its derivatives generally are not.
Piecewise-polynomial-continuous functions are often encountered when attempting to limit a function, for example when constructing a reciprocator (a circuit that can implement the function Y=1/X). If the circuit is properly constructed, base current errors are minimized to such a degree that the circuit will consume extravagant amounts of current as it approaches the singularity at X=0. To rectify this problem, a practical reciprocator is best constructed using a piecewise-polynomial-continuous function of the form:
                    Y        =                  {                                                                      1                  /                  X                                                            if                                                              X                  >                  K                                                                                                      1                  /                  K                                                            if                                                              X                  ≤                  K                                                                                        [        13        ]            
Piecewise-polynomial-continuous functions of N regions can be implemented using N meshed translinear loops, using a circuit technique known as a Trafton-Hastings clamp, herein sometimes referred to as a T/H clamp. An original form of the T/H clamp is shown in U.S. Pat. No. 5,134,355, assigned to the assignee hereof U.S. Pat. No. 5,134,355 is incorporated in its entirety herein by reference.
One version of the T/H clamp incorporated into a reciprocator 14 realized using a four-term one-quadrant multiplier is shown in FIG. 2. The reciprocator circuit 14 includes three limbs, limb 16 oriented counterclockwise and limbs 18 and 20 oriented clockwise. A T/H clamp is provided by transistor Q7, which is connected between the collector of Q1 and base of the Q2 and the reference potential. The base of the T/H clamp is connected to the collector of the second transistor in the limb 18. The output of the circuit is derived at the collector of transistor Q6. The circuit of FIG. 2 has been simplified by the elimination of the beta correction circuitry, which is generally necessary in order for a practical circuit to function adequately.
Details of beta corrector circuitry in conjunction with the reciprocator circuit 14 of FIG. 2 are shown in the circuit 22 FIG. 3, to which reference is now additionally made. The circuit 22 is an example of a piecewise-polynomial-continuous translinear network with two output limbs 24 and 26. Output limb 24 includes transistors Q3 and Q4, used in the beta corrector, and output limb 26 includes transistors Q7 and Q8 that generate the actual output current. The output limbs 24 and 26 are duplicates of one another, ensuring that the emitter of transistor Q10 sees a current equal to IY (neglecting Early voltage and similar nonidealities).
Transistor Q10 generates a base current approximately equal to IY/β; actually this current IB equals
                              I          B                =                                            β              -              1                                      β              2                                ⁢                      I            Y                                              [        14        ]            This current is mirrored by M1-M2, and is fed back to the base of Q4 to correct for the base current consumed by this transistor. The beta-correction current generated by this circuit must be less than IY/β, or positive feedback around the loop Q4-Q10-M1-M2 will cause the circuit to latch up. To ensure that this does not happen, the current ratio of current mirror M1-M2 is usually reduced to about 90%. This means that the circuit compensates for about 90% of the base current error at Q4. Because the collector current of transistor Q4 increases as IX decreases, a high degree of beta correction is required to ensure a reasonable degree of accuracy within the circuit; 90% is typically insufficient. Therefore, the second and independent output limb 26 that includes transistors Q7 and Q8 is inserted, and the mirror transistors M1 and M4 are made equal in size. No risk of runaway positive feedback exists, as no loop closes around M1 and M4. This two-stage beta correction scheme therefore generally provides an effective beta correction approaching 99%.
Beta helper transistor Q9 has been inserted to compensate for the base currents of transistors Q2, Q3, Q5 and Q7. No beta correction circuitry has been added for transistor Q1, but by making IC2 relatively large, and adjusting the emitter areas so that IC1 is relatively small, the base current error introduced by transistor Q1 can be reduced to inconsequential proportions.
With reference again to FIG. 2, the circuit 14 contains three identifiable translinear loops: Q1-Q2-Q3-Q4, Q1-Q2-Q5-Q6, and Q4-Q3-Q5-Q6. Although the circuit can be analyzed by applying the classical translinear principle to these three loops, it is more profitable to analyze the circuit as a mesh of three branches: Q1-Q2, Q3-Q4, and Q5-Q6. The equivalent of equation [5] now becomesVBE1+VBE2=VBE3+VBE4=VBE5+VBE6  [15]
Applying the translinear principle, we find the equivalent of equation [7] to be
                                                        I              C1                        ⁢                          I              C2                                                          A              E1                        ⁢                          A              E2                                      =                                                            I                C3                            ⁢                              I                C4                                                                    A                E3                            ⁢                              A                E4                                              =                                                    I                C5                            ⁢                              I                C6                                                                    A                E5                            ⁢                              A                E6                                                                        [        16        ]            
If we assume that all of the emitter areas are equal, and we substitute in the value of the currents feeding the various transistors, the above equation simplifies toIC1IB=IXIC4=IXIY  [17]
By comparing the second and third terms of the equality, we see that (barring singularities) IC4 equals IY. If this current is less than IC, then the voltage at node N1 is high, and Trafton-Hastings clamp transistor Q7 is off. Then current IC1 equals IA, and we can use the first and third terms of equality [16] to find IY:
                              I          Y                =                                            I              A                        ⁢                          I              B                                            I            X                                              [        18        ]            
If the current IC4 is greater than IC1 then the voltage at N1 drops and Q7 begins to conduct. This draws current away from transistor Q1 until the current IC4 rises to just equal IC. Now we can use the second and third terms of equality [16] to find IY:
                              I          Y                =                                            I              X                                      I              X                                ⁢                      I            C                                              [        19        ]            
So long as IY≠0, equation [18] simplifies to IX=IC. Combining this with equation [17], we find that the function implemented by the circuit 14 of FIG. 2 is:
                              I          Y                =                  {                                                                                                                I                      A                                        ⁢                                          I                      B                                                                            I                    X                                                                              for                                                                                  I                    X                                    >                                                                                    I                        A                                            ⁢                                              I                        B                                                                                    I                      C                                                                                                                                            I                  C                                                            for                                                              0                  <                                      I                    X                                    ≤                                                                                    I                        A                                            ⁢                                              I                        B                                                                                    I                      C                                                                                                    }                                    [        20        ]            
Comparison of equation [20] with equation [13] shows their essential similarity. The presence of terms IA and IB, both of which are assumed to be constants, is necessary in order to balance the physical units of the equation, if for no other reason. Their presence in no way lessens the similarity between the functions of equations [13] and [20]. The role of constant K in equation [13] is played by the quantity IAIB/IC in equation [20]. Again, since IA and IB are constants, there are no essential differences. Since the reciprocator was based on a one-quadrant circuit, we do not expect operation to be defined for IX<0. However, operation is also not defined for IX=0, as a singularity is present at this point.
FIG. 4 shows a simplified schematic 30 of the circuit 14 of FIG. 2. This schematic 30 illustrates the three limbs of the mesh: Q1-Q2, Q3-Q4 and Q5-Q6. The three limbs may be referred to as the reference limb (Q1-Q2), the control limb (Q3-Q4) and the output limb (Q5-Q6). The control and reference limbs are linked by a Trafton-Hastings clamp, which shunts away current from the reference transistor when the current flowing through the control transistor exceeds a limiting value set by a current source (this current source being part of the Trafton-Hastings clamp). The Trafton-Hastings clamp is most often implemented using a bipolar PNP transistor whose base is connected to the collector of the control transistor and whose emitter is connected to draw current away from the reference transistor. Alternative implementations can easily be envisioned, such as using a PMOS transistor rather than a PNP transistor, or substituting an operational amplifier for the transistor. Further, Q1 may be referred to as the reference transistor, Q4 as the control transistor, and Q6 as the output transistor. If each limb is generalized to contain M transistors, then the translinear equations become
                                          J            O                    ⁢                                    ∏              O                        ⁢            J                          =                                            J              C                        ⁢                                          ∏                C                            ⁢              J                                =                                    J              R                        ⁢                                          ∏                R                            ⁢              J                                                          [        21        ]            where “O”, “C” and “R” stand for the output, control and reference limbs, respectively, and JO, JC, and JR represent the collector current densities through the output, control and reference transistors, Q6, Q4, Q1, respectively. The output, control and reference transistors Q6, Q4, Q1, have been listed as explicit terms, leaving M−1 terms in each product. If these products are treated as variables, then equation [20] reduces toJOΠO=JCΠC=JRΠR  [22]In this equation, JO is a dependent variable, and therefore the value of JOΠO will be constrained by one of the other terms. The value of JC cannot exceed the limiting value JL, defined as
                              J          L                =                              I            L                                A            EC                                              [        23        ]            where IL is the current provided by the source connected to the collector of the control transistor, and AEC is the emitter area of the control transistor. While JC<JL, JR will equal the current JI from the current source connected to the collector of the input transistor, JO will then equal
                              J          O                =                                            J              I                        ⁢                          Π              R                                            Π            O                                              [        24        ]            
When JC≧JL, the output current JO will be determined by the control limb, where JC=JL,
                              J          O                =                                            J              L                        ⁢                          Π              C                                            Π            O                                              [        25        ]            
Combining [23] and [24], and expressing the limiting inequalities in terms of JI,
                              J          O                =                  {                                                                                                                                                                  J                          I                                                ⁢                                                  Π                          R                                                                                            Π                        O                                                              ⁢                                                                                  ⁢                    for                    ⁢                                                                                  ⁢                                          J                      I                                                        <                                                                                    J                        L                                            ⁢                                              Π                        C                                                                                    Π                      R                                                                                                                                                                                                                                        J                          L                                                ⁢                                                  Π                          C                                                                                            Π                        O                                                              ⁢                                                                                  ⁢                    for                    ⁢                                                                                  ⁢                                          J                      I                                                        ≥                                                                                    J                        L                                            ⁢                                              Π                        C                                                                                    Π                      R                                                                                                                              [        26        ]            
Trafton-Hastings clamps can be cascaded to generate a piecewise-polynomial-continuous function of more than two segments. FIG. 5 shows a translinear network 32 that generates a three-segment piecewise-polynomial-continuous function.
The circuit 34 of FIG. 5 contains a primary Trafton-Hastings clamp including the control transistor Q4 and the reference transistor Q1. The circuit 34 also contains a secondary Trafton-Hastings clamp including the control transistor Q6 and the reference transistor Q3. Although each limb of the circuit 34 contains only two transistors, clearly any number can be present. Similarly, the circuit can be elaborated to include additional subordinate clamps. In a fully generalized case, the circuit may also include more than one output limb.
A generalized translinear network containing NC cascaded Trafton-Hastings clamps will have NC+1 segments in its piecewise-polynomial-continuous output functions, the first of which corresponds to the condition where the primary clamp has not yet reached its compliance limit, and the NO output functions JO equal
                              J                      O            1                          =                                                                              J                                      I                    1                                                  ⁢                                  Π                  R                                                            Π                O                                      ⁢                                                  ⁢            for            ⁢                                                  ⁢                          J              I                                <                                                    J                                  L                  1                                            ⁢                              Π                C                                                    Π              R                                                          [        27        ]            
The second segment of the output function(s) appear when the first Trafton-Hastings clamp has reached its limit, but the second has not,
                              J                      O            i                          =                                                                              J                                      L                    2                                                  ⁢                                  J                                      I                    3                                                  ⁢                                  Π                                      C                    2                                                                              Π                O                                      ⁢                                                  ⁢            for            ⁢                                                  ⁢                                                            J                                      L                    1                                                  ⁢                                  J                                      I                    2                                                  ⁢                                  Π                                      C                    1                                                                              Π                R                                              ≤                      J                          I              1                                <                                                    J                                  L                  2                                            ⁢                              J                                  I                  3                                            ⁢                              Π                                  C                  2                                                                    Π              R                                                          [        28        ]            Generalizing, for the nth segment of the output function(s),
                              J                      O            i                          =                                                                              J                                      L                    n                                                  ⁢                                  J                                      I                                          n                      +                      1                                                                      ⁢                                  Π                                      C                    n                                                                              Π                O                                      ⁢                                                  ⁢            for            ⁢                                                  ⁢                                                            J                                      L                    n                                                  ⁢                                  J                                      I                                          n                      +                      1                                                                      ⁢                                  Π                                      C                    n                                                                              Π                R                                              ≤                      J                          I              n                                <                                                    J                                  L                                      n                    +                    1                                                              ⁢                              J                                  I                                      n                    +                    2                                                              ⁢                              Π                                  C                                      n                    +                    1                                                                                      Π              R                                                          [        29        ]            
All translinear networks that generate piecewise-polynomial-continuous functions of the form P/Q have singular points in their output solutions, caused when terms in the denominator Q go to zero. Most of these cause the output to increase without limit, as would be the case of the simple reciprocal function Y=1/X when X→0. These singularities are essential to the function, in that it is impossible to compute Y at points arbitrarily close to X=0 without accounting for the singularity at X=0. On the other hand, some singularities are removable, in that they do not affect the value of the function at any point except at the singularity itself. For example, the following equation, encountered in the limited reciprocator discussed above, has an removable singularity at IX=0.
                              I          Y                =                                            I              X                                      I              X                                ⁢                      I            C                                              [        30        ]            
In this function, IY=IC for all values of IX except IX=0, where IY becomes undefined. This sort of removable singularity actually affects the operation of a practical realization of the function using a Trafton-Hastings clamped translinear network. FIG. 2 shows the network that implements equation [30], and when IX=0, transistors Q3 and Q5 become unbiased and the output of the circuit becomes undefined. How close the circuit will operate to the singularity depends upon the degree to which beta and other nonidealities have been compensated. In practice, there always exists a small region about IX=0 in which the output behaves erratically.